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无限数科技有限公司成立于 2019 年,是一家高端以太网交换机芯片设计商,旨在为高性能交换机、云、数据中心提供全球领先的芯片产品及软件解决方案,以驱动服务于 5G、AI、云计算和自动驾驶的下一代核心基础网络。
公司总部在深圳,研发中心设立于硅谷、上海和南京。
无限数科技在2020年6月完成天使轮融资,红杉中国领投,融资金额数千万元。2020年7月,在上海举行的年度世界人工智能大会上,无限数科技与寒武纪、壁刃、百度等 36 家企业一起被评选为被上海市政府评为“一类人工智能企业”!
目前公司已有40+人的技术骨干,他们大部分来自博通、思科、因特尔等行业领先公司,把握行业最新动向,带你快速成长。
我们欢迎优秀的你加入无限数,共同成长,乘风破浪。
公司提供:
1、 完善的薪资绩效体系:具有竞争力的薪酬 + 公司期权;
2、 正规的社会保障体系:全额缴纳五险一金 + 补充公积金;
3、 灵活的个人发展通路:快速晋升 + 多项发展;
4、 人性化的考勤体系:弹性工作制 + 法定年假;
5、 多样化的员工关怀:节假日弹性化的福利+形式多样的团建活动;
6、 办公环境舒适、公司氛围自由、同事好相处、领导好沟通。
芯片设计工程师
Responsibilities
1. Responsible for all the aspects of the ASIC front end design, including the micro- architecture, RTL, synthesis, logic and timing verification;
2. Document, execute the plan, and deliver fully verified, high performance, area and power efficient design to achieve the targets and specifications;
3. Work with the verification team, guide and review the verification plan;4. Participate in post silicon bring-up and validation.
Qualifications
1. 1~5 years of complex high-speed digital IC design experience with all stages in the ASIC design flow including emulation, prototyping, DFT, Synthesis, timing analysis, floorplanning, ECO, bringup & lab debug, and ATE test development;
2. Bachelor’s degree in Electrical Engineering or Computer Engineer or related field required; MS or Ph.D. degree a plus;
3. Experience with standard EDA tools from Synopsys or Cadence;
4. Strong working knowledge of languages relevant to the ASIC development process including Verilog, Unix/Perl Scripting or Python, and C/C++;
5. Excellent knowledge of ARM subsystem, PCIe and industry standard peripherals including I2C, UART, SPI;
6. Experiences with complex networking ASIC design and knowledge with networking protocols and RFCs are big plusses.
Compensations We offer very competitive salary, significant stock equity, and generous benefits plan
芯片验证工程师
Responsibilities
1. Responsible for all the aspects of the ASIC design verification - formulating the verification strategy, building the state-of-art testbench, developing the detailed test plan and test cases, carrying out the regression and tracking the status, driving the coverage closure, and executing the emulation plan;
2. Work closely with architecture and design teams to deliver a fully verified design to achieve bug-free tapeout;
3. Participate in post silicon bring-up and validation.
Qualifications
1. 5+ years of complex high-speed digital IC design verification experience with all stages in the ASIC design verification flow;
2. Proven track record of managing IC design verification teams with multiple successful complex ASIC tape-outs in a highly dynamic environment;
3. Bachelor’s degree in Electrical Engineering or Computer Engineer or related field required; MS or Ph.D. degree a plus;
4. Strong working knowledge of Verilog, SystemVerilog, UVM, Scripting language (Perl)
5. Experience with standard EDA tools from Synopsys or Cadence;
6. Familiar with advanced verification methodologies;
7. Experiences with complex networking ASIC design verification, knowledge with networking protocols and RFCs, and experience with emulation platforms (Synopsys Zebu or Cadence Palladium) are big plusses.
Compensations We offer very competitive salary, significant stock equity, and generous benefits plan.
P4研发工程师
主要职责:
负责基于自研以太网交换芯片的P4程序设计和开发。
任职要求:
1. 深入理解二层交换和三层路由相关概念和原理;
2. 深入理解P4语言;
3. 熟悉python等脚本语言;
4. 熟悉SDN,了解openFlow规范;
5. 熟悉BROADCOM/BAREFOOT/MARVELL等交换芯片。
交换芯片SDK软件工程师
主要职责:
1. 交换芯片驱动程序设计和开发;
2. 验证芯片功能。
任职要求:
1. 电子、计算机、自动化等相关专业本科以上;
2. 熟悉Linux嵌入式开发;
3. 具备丰富的C语言开发经验;
4. 熟悉二三层网络协议;
5. 熟悉BROADCOM/BAREFOOT/MARVELL等交换芯片SDK者优先。
Linux驱动开发工程师
主要职责:
1、Linux的内核移植升级;
2、Linux下BSP开发和调试;
3、负责解决内存泄漏、死锁等负责问题;
4、负责调试工具开发;
5、负责自动化工具开发。
任职要求:
1、计算机、电子、通信等专业本科及以上学历;
2、熟悉bootloader,有相关开发经验;
3、有过Linux驱动开发经验,精通Linux内核平台移植;
4、熟悉Linux 设备驱动开发;
5、熟悉Linux内核框架,Linux驱动模型;
6、熟悉linux下各种工具链者优先;
7、熟悉Makefile和脚本语言(Bash/Perl/Python)优先。
SerDes驱动工程师
主要职责:
1. 交换SerDes驱动程序设计和开发;
2. 支持客户解决SerDes问题;
3. 验证SerDes芯片功能。
任职要求:
1. 电子、计算机、自动化等相关专业本科以上;
2. 有3年以上SerDes驱动开发经验或port模块开发经验;
3. 熟悉IEEE SerDes相关标准